ess technology, inc. sam0358-052201 1 es4428/ES4427 web/dvd set-top box solution product brief description the es4428/ES4427 web/dvd internet set-top box chipset seamlessly combines both web browser technology and dvd technology into a highly integrated, low-cost solution for the next generation of internet set-top boxes for home use. the es4428, which is based on esss programmable multimedia processor (pmp) device architecture, includes a programmable internal risc processor core that makes it adaptable for use in embedded systems applications such as set-top boxes. the ES4427 companion chip supplies proper video sync capabilities and performs ntsc- and pal-based video encoding and decoding as necessary to provide broadcast quality video to the television screen. the es4428 dvd processor integrates mpeg-based audio and video data stream decoding for dvd/vcd/supervcd playback, dvd system navigation and dolby ac-3 decoding into a single device. the es4428 demuxes the incoming dvd audio and video data streams from the dvd loader using its glueless 8/16- bit parallel interface, which is hardware-compatible with many dvd loaders. the es4428 also supports both 8- and 16-bit flash/read-only memory (rom) and 8- and 16-bit synchronous dram (sdram) memory i/o operations. the es4428 controls data i/o transactions to and from the ES4427 companion chip through its 8-bit device serial connect (dsc) parallel bus interface. the es4428 also provides a 16-bit wide hardware interface with v.90-compatible modem subsystems incorporated into the set-top box design. the ES4427 incorporates a multi-standard tv encoder that supports both the ntsc and pal formats and ccir-601 non- square operations. two microphone adcs and pll clock synthesizers are incorporated in the ES4427 device architecture. the ES4427 includes an i/o-mapped auxiliary expansion port that interfaces with the es4428. four pins of the port can be configured as edge-triggered interrupts, supporting critical functions, such as handling remote control and modem interrupt requests, dvd/vcd loader resets and modem board resets. command and register accesses are issued through the dsc interface from the es4428 dvd processor to the ES4427 through the device serial communication (dsc) interface for accessing the internal registers of the ES4427. the dsc interface port is comprised of three interface signals, the strobe (dsc_s), data (dsc_d), and clock (dsc_c). the dsc port is selected when the dsc strobe goes high and latches the data at the rising edge of the clock. each 16-bit dsc transfer is comprised of an address followed by data. the es4428 is available in an industry-standard 208-pin plastic quad flat pack (pqfp) package, while the ES4427 is available in an industry-standard 100-pin pqfp package. es4428 features ? on-chip hardware interface with v.90 data/fax/voice modem subsystem implemented ? 640 x 480 ntsc and 640 x 576 pal television video formats supported ? configurable for browser/dvd applications ? hardware support for infrared remote control and/or wireless keyboard ? on-chip mpeg audio/video decoder and system parser ? on-chip on-screen display (osd) controller supports 4-bit blending. ? on-chip subpicture unit (spu) decoder supports karaoke lyric, subtitle and closed captioning functions. ? videocd 1.1 and 2.0, interactive 3.0, super vcd and audio cd compatibility available with video cd / super vcd player configuration ? videocd 1.1 and 2.0, interactive 3.0, super vcd, audio cd and mp3 compatibility available with super vcd / dvd player configuration ? dts audio decoding supported ? programmable multimedia processor architecture ? iso/iec 13818-2 mpeg-2 compliant ? iso/iec 11172 mpeg-1 compliant ES4427 features ? 8-bit dsc parallel bus interface generates edge-triggered interupts for data read/write interfacing with es4428 ? dual microphone and vocal assist hardware support provided ? pll clock synthesizer based on 27 mhz crystal input generates required clocks for video encoder, video dacs and video processor software support ? software stack support for the pop3, smtp and snmp internet e-mail protocols defined by rfc 821, rfc 1157and rfc 2449 ? software stack support provided for the http web browsing protocol defined by rfc 1945, rfc 2068 and rfc 2616 ? software stack support provided for the tcp/ip internet protocols defined by rfc 791 and rfc 793 ? software stack support provided for rtp payload format for mpeg-1/2 and h.261 video streaming protocols defined by rfc 2032, rfc 2038 and rfc 2250 ? software support for html 1.0, 2.0 and 3.2, *.aiff, *.au and *.wav audio file formats and *.gif, *.jpg and *.xbm graphic file formats, javascript 1.1, ssl 2.0 and ssl 3.0 ? character generation and software support for english, big 5/gb chinese and japanese fonts ? software support for infrared remote control and wireless keyboard
2 sam0358-052201 ess technology, inc. es4428/ES4427 product brief es4428 pinout figure 1 shows the es4428 device pinout. figure 1 es4428 device pinout 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 lcs1# loe# ld0 vss lcs3# lcs2# aux0 la21 la20 reset# vcc nc nc nc vss nc nc nc hd4 hd5 hd6 hd2 hd3 vcc vcc db8 vcc db5 db9 dcs0# vcc vss tsd/sel_pll0 sel_pll2 tdmfs tdmclk tdmdr tdmtsc# tws/sel_pll1 vcc la4 la5 la6 la7 la8 la9 vss vcc la10 la11 la12 la13 la14 la15 la16 vss vcc la17 la18 la19 tdmdx/rsel vss nc nc nc vss mclk tbck vcc vcc vss vss dqm rsd rws rbck apllcap xin xout vcc dsck vss db15 db13 db11 db1 vss dras2#/dbanksel0 dras0# doe#/dsck_en vcc dma9 dma7 vss dma5 dma3 vcc dcs1# db14 db12 db10 db0 vcc dras1#/dbanksel1 dwe# dcas# vss dma8 dma6 vcc dma4 dma2 vss db7 db6 vss db4 db3 db2 dma11 dma10 dma1 dma0 nc nc vss nc vss hd13 hd12 hd11 hd10 hd9 hd8 vss nc nc nc nc hd15 hd14 vcc hd7 hd1 hd0 vcc vss hsync# pclk2xscn yuv7 yuv6 pclkqscn vsync# yuv5 vss vcc yuv4 yuv3 yuv2 yuv1 yuv0 dclk vcc aux7 aux6 vcc ld1 ld2 la3 ld12 vcc nc vpp vcc ld3 ld5 ld9 ld13 lwrhl# nc aux1 aux3 ld4 ld6 ld10 ld14 vss la0 aux2 aux4 vcc ld7 ld11 ld15 vcc la1 vss aux5 vss ld8 vss lwrll# nc la2 vss vcc lcs0# 208-pin pqfp package es4428 vss 104
3 sam0358-052201 ess technology, inc. es4428/ES4427 product brief es4428 pin description table 1 lists the pin descriptions for the es4428. table 1 es4428 pin descriptions name number i/o definition vcc 1, 9, 18, 27, 35, 44, 51, 59, 68, 75, 83, 92, 99, 104, 111, 121, 130, 139, 148, 157, 164, 172, 183, 193, 201 i 3.3v power supply. vss 8, 17, 26, 34, 43, 52, 60, 67, 76, 84, 91, 98, 103, 112, 120, 129, 138, 147, 156, 163, 171, 177, 184, 192, 200, 208 i ground. la[21:0] 23:19,16:10,7:2,207:204 o device address output. reset# 24 i reset. tdmdx 25 o tdm transmit data output. rsel i rom select. tdmdr 28 i tdm receive data input. tdmclk 29 i tdm clock input. tdmfs 30 i tdm frame sync. tdmtsc# 31 o tdm output enable. tws 32 o audio transmit frame sync output. sel_pll1 system and dsck output clock frequency selection at reset time. the matrix below lists the available clock frequencies and their respective pll bit settings.. tsd 33 o audio transmit serial data output. sel_pll0 i refer to the description and matrix for sel_pll1 pin 32. sel_pll2 36 i refer to the description and matrix for sel_pll1 pin 32. nc 37, 38, 41, 42, 146:142, 155:149, 158, 203:202 no connect. leave open. mclk 39 i/o audio master clock for audio dac. tbck 40 i/o audio transmit bit clock output. rsd 45 i audio receive serial data input. rws 46 i audio receive frame sync input. rbck 47 i audio receive bit clock input. apllcap 48 i analog pll capacitor input. rsel selection 0 16-bit rom 1 8-bit rom sel_pll2 sel_pll1 sel_pll0 clock output 0 0 0 vco doesnt work. 00 127 mhz 0 1 0 bypass mode 01 154 mhz 1 0 0 121.5 mhz 10 181 mhz 1 1 0 94.5 mhz 1 1 1 108 mhz
4 sam0358-052201 ess technology, inc. es4428/ES4427 product brief name number i/o definition xin 49 i crystal input. xout 50 o crystal output. dma[11:0] 66:61, 58:53 o dram address bus [11:0]. dcas# 69 o dram column address strobe. doe# 70 o dram output enable. dsck_en o dram clock enable. dwe# 71 o dram write enable. dras0# 72 o dram row address strobe 0. dras1# 73 o dram row address strobe 1 (active-low). dbanksel1 o dram address bus select 1 output. only active in 64mb sdram mode. dras2# 74 o dram row address strobe 2 output. dbanksel0 o dram address bus select 0 output. only active in 64mb sdram mode. db[15:0] 96:93, 90:85, 82:77 i/o dram data bus [15:0]. dcs[1:0]# 97, 100 o sdram chip select [1:0]. dqm 101 o data input/output mask. dsck 102 o output clock to sdram. dclk 105 i 27 mhz clock input to pll. yuv[7:0] 115:113, 110:106 o 8-bit yuv output. pclk2xscn 116 i/o 2x pixel clock. pclkqscn 117 i/o pixel clock. vsync# 118 i/o vertical sync. hsync# 119 i/o horizontal sync. hd[15:0] 141:140, 137:131, 128:122 i/o host data bus vpp 159 i 5.0v power supply. aux[7:0] 169:165,162:160 i/o auxiliary ports. loe# 170 o eprom device output enable. lcs[3:0]# 176:173 o eprom chip select [3:0]. ld[15:0] 197:194, 191:185, 182:178 i/o eprom device data bus. lwrll# 198 o device write enable. lwrhl# 199 o device write enable (active-low). table 1 es4428 pin descriptions (continued)
5 sam0358-052201 ess technology, inc. es4428/ES4427 product brief ES4427 pinout figure 2 shows the ES4427 device pinout. figure 2 ES4427 device pinout ES4427 pin description table 2 lists the pin descriptions for the ES4427. 1 mic1 mic2 aol+ aol- aor- aor+ vccaa vrefp vcm vssaa aux15/ir aux14 aux13 rbck/ser_in aux12/c2po aux11/irq aux10 rsd/sel_pll0 vcc vss dsc_d7 hsyn_b dsc_d6 vsyn_b dsc_d5 yuv7 yuv6 yuv5 yuv4 vcc vss yuv3 dsc_d4 yuv2 dsc_d3 yuv1 dsc_d2 yuv0 dsc_d1 vss tsd aux9 tws/spll_out aux8 mclk vcc mute aux7 reset_b dclk/ext_clk aux2 dsc_s aux1 dsc_d0 aux0 dsc_c vcc nc nc vss nc nc nc nc nc vss vss rstout_b rws/sel_pll1 tbck ydac vssav vssav vdac acap vcc aux6 aux5 aux4 aux3 xout vss vcc xin vss nc vss vcc pclk 2xpclk vssaa vref vrefm rset comp vssav vssav cdac vccav vccav 31 30 51 50 80 81 100 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 ES4427 100-pin pqfp table 2 ES4427 pin descriptions name number i/o definition vss 1, 25:26, 31, 72, 75, 77, 91, 100 i ground. nc 2:4, 27:30, 76 no connect. vcc 5, 16, 32, 66, 73, 78, 90 i 5.0v power supply. dsc_c 6 i clock for programming to access internal registers. aux0 7 i/o general purpose i/o. dsc_d[7:0] 8, 81, 83, 85, 93, 95, 97, 99 i/o data for programming to access internal registers. aux1 9 i/o general purpose i/o. dsc_s 10 i strobe for programming to access internal registers. aux2 11 i/o general purpose i/o. dclk 12 o mpeg decoder output clock. ext_clk i ext_clk is the external clock ext_clk is an input during bypass pll mode. reset# 13 i reset. aux7 14 i/o general purpose i/o. mute 15 o audio mute. mclk 17 i audio master clock.
6 sam0358-052201 ess technology, inc. es4428/ES4427 product brief name number i/o definition aux8 18 i/o general purpose i/o. tws 19 i transmit audio frame sync. spll_out o spll_out is the select pll output. aux9 20 i/o general purpose i/o. tsd 21 i transmit audio data input. tbck 22 i transmit audio bit clock. rws 23 o receive audio frame sync. sel_pll1 i system and dsck output clock frequency selection at reset time. the matrix below lists the available clock frequencies and their respective pll bit settings.. rstout# 24 o reset output. rsd 33 o receive audio data input. sel_pll0 i refer to the description and matrix for sel_pll1 pin 23. aux10 34 i/o general purpose i/o. aux11 35 i/o interrupt output to es4428. aux12 36 i/o cd loader c2po. rbck 37 o receive audio bit output clock. ser_in i ser_in is the serial input dsc mode. 1 = serial dsc mode. 0 = parallel dsc mode. aux13 38 i/o general purpose i/o. aux14 39 i/o interrupt input from modem dsp. aux15 40 i/o ir interrupt input. vssaa 41,51 i audio analog ground. vcm 42 i adc common mode reference (cmr) buffer output. cmr is approximately 2.25 v. bypass to analog ground with 47 m f electrolytic in parallel with 0.1 m f. vrefp 43 i dac and adc maximum reference. bypass to vcmr with 10 m f in parallel with 0.1 m f. vccaa 44 i 5.0v analog audio power supply. aor+, aor- 45, 46 o right channel output. aol-, aol+ 47, 48 o left channel output. mic2 49 i microphone input 2. mic1 50 i microphone input 1. vref 52 i internal resistor divider generates common mode reference (cmr) voltage. bypass to analog ground with 0.1 m f. vrefm 53 i dac and adc minimum reference. bypass to vcmr with 10 m f in parallel with 0.1 m f. rset 54 i full scale dac current adjustment. comp 55 i compensation pin. vssav 56:57, 62:63 i video analog ground cdac 58 o modulated chrominance output. vccav 59, 60 i video vcc, 5 v table 2 ES4427 pin descriptions (continued) sel_pll1 sel_pll0 dclk 0 0 bypass pll (input mode) 0 1 27 mhz (output mode) default 1 0 32.4 mhz (output mode) 1 1 40.5 mhz (output mode)
7 sam0358-052201 ess technology, inc. es4428/ES4427 product brief system block diagram figure 3 shows a sample system block diagram of an ess-based web/dvd system. figure 3 es4428/ES4427 system block diagram name number i/o definition ydac 61 o y luminance data bus for screen video port. vdac 64 o composite video output. acap 65 i audio cap aux6 67 i/o general purpose i/o. aux5 68 i/o general purpose i/o. aux4 69 i/o modem dsp reset. aux3 70 i/o cd loader reset. xout 71 o crystal output. xin 74 i 27 mhz crystal input. pclk 79 i/o 13.5 mhz pixel clock. 2xpclk 80 i/o 27 mhz doubled pixel clock. hsync# 82 o horizontal sync. vsync# 84 o vertical sync. yuv[7:0] 86:89, 92, 94, 96, 98 i yuv data bus for screen video port. table 2 ES4427 pin descriptions (continued) interface front panel sdram rom or flash rom phone remote control/ keyboard processor es2828 es4428 mc97 afe es2898 modem dsp ES4427 wireless web/dvd line companion chip dac audio encoder video (iso 7816-3) smart card drive dvd
8 sam0358-052201 ess technology, inc. es4428/ES4427 product brief mechanical dimensions, es4428 figure 4 shows the mechanical dimensions of the es4428. figure 4 es4428 mechanical dimensions see detail a e e1 e3 152 157 208 index 53 104 d d1 d3 105 pin 1 note: 1. all dimensions are in inches (millimeters). 2. actual package used has millimeter native dimensions C take care with rounding from metric to imperial. symbol min nom max a C C 0.165 a1 0.010 (0.25) C C a2 0.130 (3.30) 0.134 (3.40) 0.138 (3.50) b 0.007 (0.18) 0.009 (0.23) 0.011 (0.28) c 0.005 (0.12) 0.006 (0.16) 0.008 (0.20) d 1.195 (30.35) 1.205 (30.60) 1.215 (30.85) d1 1.098 (27.90) 1.102 (28.00) 1.106 (28.10) d3 1.004 (25.50) ref e 0.0197 (0.50) basic e 1.195 (30.35) 1.205 (30.60) 1.215 (30.85) e1 1.098 (27.90) 1.102 (28.00) 1.106 (28.10) e3 1.004 (25.50) ref l 0.016 (0.40) 0.020 (0.50) 0.024 (0.60) f 0 i 2.5 i 5.0 i e a1 a2 l c b 156 f
ess technology, inc. sam0358-052201 9 es4428/ES4427 product brief mechanical dimensions, ES4427 figure 5 shows the mechanical dimensions of the ES4427. figure 5 ES4427 mechanical dimensions symbol description millimeters min nom max d lead to lead, x-axis 23.65 23.90 24.15 d1 packages outside, x-axis 19.90 20.00 20.10 e lead to lead, y-axis 17.65 17.90 18.15 e1 packages outside, y-axis 13.90 14.00 14.10 a1 board standoff 0.10 0.25 0.36 a2 package thickness 2.57 2.71 2.87 b lead width 0.20 0.30 0.40 e lead pitch -0.65- e1 lead gap 0.24 - - l foot length 0.65 0.80 0.95 l1 lead length 1.88 1.95 2.02 - foot angle 0 - 7 - coplanarity - - 0.102 - leads in x-axis -30- - leads in y-axis -20- - total leads -100- - package type -pqfp- a2 a1 l b e e1 l1 d1 d e1 e ES4427 100-pin pqfp 1
10 ? 20002001 ess technology, inc. all rights reserved. sam0358-052201 es4428/ES4427 product brief no part of this publication may be reproduced, stored in a retrieval system, transmitted, or translated in any form or by any means, electronic, mechanical, manual, optical, or otherwise, without the prior written permission of ess technology, inc. ess technology, inc. makes no representations or warranties regarding the content of this document. all specifications are subject to change without prior notice. ess technology, inc. assumes no responsibility for any errors contained herein. (p) u.s. patent 4,214,125 and others, other patents pending. all other trademarks are owned by their respective holders and are used for identification purposes only. ordering information part number description package es4428 web dvd processor 208-pin pqfp ES4427 companion chip 100-pin pqfp
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